Keys to Process Improvement

Process change can be triggered by multiple business reasons: E.g. cost reduction, quality improvement, defect reduction, yield improvement, new toolset introduction, process step modification, …etc. Whatever the change, all key stakeholders (product manufacturer and customer) must agree before the change is approved.

Here are some keys to a successful process change:

1. Assemble a Team of Experts:

It is crucial to assemble a team of experts. In semiconductor processing as well as other manufacturing processes, such a team must consist of an

a. Integration Engineer: Has expertise in the process flow.

b. Tool Engineer: Is an expert on the tool at operation requiring change.

c. Quality and Reliability Engineer (QRE): Contains DOE (Design of Experiment) Material, Provides Risk Assessment based on QC (Quality Check) data & provides Disposition.

d. Statistician: Helps determine sampling population.

This team might consist of other stakeholders but the first three are key. It is advisable not to have a large group as it might slow decision making.

2. Convene Planning Meetings:

The team of experts works together on the following steps under the QRE’s leadership:

a. Identify process step(s) to be changed: best to implement one change at a time.

b. Establish potential failure modes, severity and their effect on the customer

c. Establish detection mechanism and mitigation steps

d. Design experiments on a statistically significant sample quantity (more on this later).

e. Process DOE samples following the experimental steps outlined above. Incorporate all noise factors.

f. Ensure all units undergo 100% sampling at every stage for comparison with POR baseline.

3. Jointly Perform an FMEA (Failure Modes and Effects Analysis):

FMEA is a structured method to identify & prioritize potential problems or failures in a system, product, process or service before they occur. The critical steps involved are:

i. Identify potential failures & effects

ii. Determine Severity to customers (SEV). Scale SEV on 1-10, with 10 = High Impact

iii. Gauge Probability of Failure Occurrence (OCC): 1-10, with 10 = High Occurrence

iv. Assess Detectability (DET): 1-10, with 10 = Low Detectability

v. For each event, calculate the risk score, aka Risk Priority Number, RPN = SEV × OCC × DET

a. Low RPN events = Less risky

b. High RPN event = High risk, demands immediate attention

vi. Provide actions on all high RPNs and on severity ratings of 9 or 10.

4. DOE Implementation

A DOE is implemented with a statistically significant sample population selected following zero defects' standards (i.e., 3.4 defects per million opportunities, within +/- 1.5 sigma process shift). Spec validation and noise factors must be accounted for. Additionally, it is important to have at least 10% more samples per DOE leg to account for unplanned failures and defects.

5. Test DOE Samples and Compare Results With the Baseline

Testing is very important to determine the quality and reliability of each process change. The results for each test must be compared to the process baseline and/or established standards.

The level of testing is determined by the expected lifetime, criticality of use and expected operational environment of the product. For example, an automotive chip will undergo more stringent testing than a client computer chip.

To further illustrate this point, let’s consider a typical semiconductor process change.

Semiconductor process change requires the following tests to be performed on the modified products (and the POR product if there is no historical baseline data):

a. Inline Testing: Testing performed using regular (POR) inline metrology. Results must match the POR product baseline. These tests are usually nondestructive: e.g., electrical tests, optical surface scan tests for defects like particles, cracks, stains, …etc. or critical dimension checks. This process is gating time zero tests. Failure might be a show-stopper or require fine-tuning depending on severity. This step is gating time zero testing.

b. Time Zero Testing: Destructive tests carried out on selected samples just before the new process can ship out to the assembly for packaging. This ensures the process change does not induce marginalities leading to post packaging failures. Testing here includes TEM, SEM, IRLC, break strength testing…etc. Failure here will require process fine-tuning or outright change cancellation. This test might be enough to qualify for some new process.

c. Reliability Testing: Stress testing performed on a finished product before approval for customer ship out. This minimizes potential failure of products in the field (working wounded). Common reliability tests in the semiconductor industry include

Ø Temperature Cycling Test (TCT): A thermal cycling stress test where temperatures change rapidly (e.g. every 15 mins) between two extremes (e.g. -55 to 125 degrees Celsius) to elicit failure modes such as die cracks, package delamination and metal displacement.

Ø Unbiased Highly Accelerated Stress Test (UHAST): Designed primarily to test delamination and corrosion. Samples are kept at 110 or 130 degrees Celsius under relative humidity (RH = 80%) for 96 or 260 hrs.

Ø Preconditioning (Pre-con or PC): Reliability tests are often preceded by preconditioning designed to simulate transport and storage conditions. Pre-cons are not meant to be a stand-alone test. They typically consist of inspections (visual/electrical), temperature cycling, reflow, moisture soak, bake, flux applications, cleaning and final testing.

Reliability test results are gated by time zero data. If time zero data is bad, their reliability cannot be performed as the samples will obviously fail reliability testing. If time zero data is good or marginal, then reliability testing can be performed.

Details on reliability testing will be presented in a separate article.

6. Post Reliability Failure Analysis and Survival Analysis

Zero defect sampling is considered passing if there is no process change related failure. To ensure this success criteria is met, Failure Analysis (FA, aka time zero data) is performed on a few post rel ‘failed’ samples and a few post rel passing samples. FA on a post rel passing sample is called survival analysis.

7. Decision

Once it is determined that there is no process change related failure, the new process change is documented in a white paper and approved.

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